The present invention relates to a filter circuit arrangement having a plurality of cascaded FIR-filter members each of which has a length N and a group of N-1 state memories connected in series with each other to obtain the properties of an FIR-prototype filter, in which the input values and output values of the state memories are multipliable with filter coefficients and the resulting products can be added to obtain an output signal.
FIR (finite impulse response) filters of this type are known and are used in many different fields. They especially provide the advantage of high stability. In making a low-pass or high-pass FIR filter the aim often exists to obtain steep pulse sides at the input and output at the same sampling frequency. The position of the transmission range or the suppressed range should be arbitrarily selectable. Besides exacting requirements are necessary for attenuation in the transmitting region or in the cutoff region.
These goals make it indispensable to use a filter with a large filter length N. At the same time the word length of the filter coefficients must be increased with an increase of the filter length so as to counter frequency errors adding statistically by coefficient quantization.
This however has the consequence that the circuitry expense climbs to the same extent, especially the multiplier circuits are expense to make.
Expenditure limits regarding the number of multiplication circuits are described in the paper "The Optimum Design of One and Two-Dimensional FIR Filters Using the Frequency Response Masking Technique" by Y. C. Lim and Yong Lian, IEEE Transactions on Circuits and Systems, Vol. 40, No. 2, February 1993 and in "Handbook for Digital Signal Processing", John Wiley & Sons, New York. The described process is called "frequency response masking" engineering. This technique replaces each state memory in an FIR filter by several cascaded state memories. Pulse steepness or transient steepness can be increased relative to the original FIR filter without increasing the number of coefficients and of course the number of multiplication circuits. However this filter becomes complicated and expensive, because of the considerably increase in the number of state memories.